Interview Prep Zoneby CuriouserLabs

Question 2 of 5 · senior level

Interrupts vs polling: how does the CPU find out something happened, and what happens on an interrupt?

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Two ways to learn of an event: polling (keep asking — wastes CPU when idle, but predictable and cache-warm at very high event rates) and interrupts (device raises a line; the CPU, between instructions, saves minimal state, switches to kernel mode, and vectors through the interrupt descriptor table to the registered handler; on return, the interrupted code resumes unaware). Handlers must be tiny — ack the device, note the work, defer the rest (softirq/bottom half/threaded IRQ) — because they run with things masked and can't sleep. The twist seniors should know: at very high rates the answer inverts — NAPI and DPDK/io_uring polling exist because an interrupt per packet at 10M pps would melt the CPU.

The full picture

🎬 Interrupts + DMA: how I/O really happens

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CPUpolling… 🔄 (wasteful)RAMbuffer @ X: emptyDMA controlleridleDisk controllerhas the 4KBdone yet? done yet? 😫Polling burns the CPU; interrupts invert control — 'don't call us, we'll call you'.

The CPU needs 4KB from disk. Naive option — POLLING: the CPU sits in a loop asking 'done yet?', and then copies every byte itself. At disk speeds, that's millions of wasted cycles.

Polling vs program-DMA-then-interrupt — where the CPU's time goes.
  • Top/bottom half discipline: hard IRW context can't sleep or take long — so ack + queue, then softirq/workqueue does the heavy lifting with interrupts enabled. This split is why 'interrupt latency' and 'throughput work' don't fight.
  • Interrupt storms & mitigation: NICs at line rate switch to NAPI — take one interrupt, then poll until the queue drains, re-enable interrupts when idle: an adaptive hybrid that is the textbook answer to 'interrupts or polling?' — 'both, switching by load'.
  • Affinity matters operationally: /proc/interrupts, irqbalance, pinning NIC queues to cores (RSS) — tail latency on network-heavy boxes is often IRQ-affinity tuning, a very real SRE task.
  • Exceptions vs interrupts: same vectoring machinery, different trigger — exceptions are synchronous (page fault, divide-by-zero, syscall), interrupts asynchronous (timer, devices). The timer interrupt deserves its sentence: it is what makes preemptive multitasking exist.

🔄 Likely follow-up questions

  • What exactly is NAPI and when does the kernel flip modes?
  • Why can't an interrupt handler take a mutex?
  • How do MSI-X and per-queue interrupts enable multi-core packet processing?